構成 | |
struct | CoreDebug_Type |
マクロ定義 | |
#define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) |
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) |
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) |
#define | CoreDebug_DHCSR_S_HALT_Pos 17 |
#define | CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) |
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) |
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) |
#define | CoreDebug_DHCSR_C_STEP_Pos 2 |
#define | CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) |
#define | CoreDebug_DHCSR_C_HALT_Pos 1 |
#define | CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) |
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
#define | CoreDebug_DCRSR_REGWnR_Pos 16 |
#define | CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) |
#define | CoreDebug_DCRSR_REGSEL_Pos 0 |
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) |
#define | CoreDebug_DEMCR_DWTENA_Pos 24 |
#define | CoreDebug_DEMCR_DWTENA_Msk (1ul << CoreDebug_DEMCR_DWTENA_Pos) |
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) |
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) |
memory mapped structure for Core Debug Register
#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
#define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
#define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
#define CoreDebug_DEMCR_DWTENA_Msk (1ul << CoreDebug_DEMCR_DWTENA_Pos) |
CoreDebug DEMCR: DWTENA Mask
#define CoreDebug_DEMCR_DWTENA_Pos 24 |
CoreDebug DEMCR: DWTENA Position
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
#define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
#define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
#define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
#define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
#define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
#define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position